Technology solutions from Omni Design Technologies include chiplet and ASIC technology in addition to our IP offerings

Technology for Chiplet and ASIC

Chiplet and ASIC

Omni Design’s Chiplet and ASIC solutions are based on extensive domain knowledge and years of product development experience. The portfolio of solutions provides our customers with an unrivaled range of technology meeting and exceeding their system needs now and for the future. Omni Design has experience with high channel count, high speed Tx and Rx signal path integration. The team has extensive experience addressing the issues of crosstalk, noise, and channel matching that can impact large multi-channel systems. In Chiplet formats, Omni Design can provide a variety of standard interfaces including JESD204(B, C, and D), PCIe, and Bunch of Wires, etc.. For specific requirements, please contact

IP Technology Offerings

Swift™ Data Converter Technology

Swiftdata converters include proprietary IP that allows them to achieve best in class figure of merit specifications at extremely wide bandwidths, making applications such as Software Defined Radio and LiDAR power efficient but with significantly greater flexibility to the system designer. This advanced data converter architecture provides fundamental benefits to system engineers building the next generation of advanced products.

Swift™ Analog to Digital Converter Technology

Swift™ ADC Highlights

  • RF Sampling time-interleaved
  • Excellent linearity & low noise
  • Power scales with sample rate
  • 6-14 bit, 5Msps-100+Gsps

Target Applications


  • Available in 28nm through advanced FinFET nodes

Technology Overview

High-Speed Analog to Digital Converters (ADC) are a critical bridge between advanced digital signal processing operations and the sensing elements used in advanced communications, 2 & 3D imaging, and advanced computing systems. Omni Designs excels at achieving state of the art figures of merit for conversion efficiency. Further Omni Design’ Swift™ data converters have small footprints and are available in a variety of process nodes from 28nm to advanced FinFET.

All calibration is built in and runs in the background to compensate for both static and dynamic conditions.

All ADC’s have integrated buffers to simplify interfacing and ensure compatibility with the overall system performance.

Optional Digital Down Converters (DDC) are available to increase system compatibility.

The ADC’s are available as individual IP blocks or matched IQ pairs and can be efficiently arrayed for large number of input channels

Time-Interleaving Artifact Compensation

For high performance operation, time-interleaving artifacts must be minimized: Offset mismatch, gain mismatch, timing skew, bandwidth mismatch. Omni employs a combination of proprietary and patented techniques, including: analog and digital correction, foreground and background correction, randomization and redundancy resulting in no notches in the output spectrum

Use Cases

High performance communication systems are very sensitive to spurious frequency components and distortion in spectral characteristics. Omni Design minimize these effects, delivering higher system capacity and performance in customer systems.

Swift™ Digital to Analog Converter Technology

Technology Overview

High-Speed Digital to Analog converters are critical in both communications systems where it is part of a complementary transmit and receive path, as well as in active (RADAR & LiDAR) imaging systems, where a stimulus signal is used to create a reflection to be measured. In both cases, a high degree of linearity and phase control is needed over a wide bandwidth.

Omni Design utilizes a patented architecture that provides high linearity over wide bandwidths that make it ideally suited to these applications.

Further Omni Design’ Swift™ data converters have small footprints and are available in a variety of process nodes from 28nm to advanced FinFET.

All calibration is built in and runs in the background to compensates for both static and dynamic conditions.

Differential current outputs up to 0dBm CW output power.

Optional Digital Up Converters (DUC) are available to increase system compatibility.

The DAC’s are available as individual IP blocks or matched IQ pairs and can be efficiently arrayed for large number of input channels

Isolated Current Outputs

Generating clean high frequency signals presents many challenges, resulting in spectral contamination that degrades the quality of a digitally synthesized signal. Internal circuit operations can feed through contaminating the outputs, as well as the output feeding back into the circuit and modulating its performance. Unique output structure of Omni Design’s DACs isolates between the output signal and internal circuit elements drastically reducing these effects and allowing generation of broad bandwidth signals with improved SFDR & PSRR.

Use Cases

Clean signals are critical in both communications and automotive ADAS imaging systems. Advanced communications depend on dense channel configurations and complex modulation schemes and are sensitive to unwanted spectral artifacts that can degrade channel bandwidth. Omni Designs’ Swift™ DACs ensure maximum performance can be achieved.

Swift™ DAC Highlights

  • Differential current output
  • Wide output bandwidth
  • Excellent linearity and low noise
  • Embedded direct digital synthesis
  • 6-16 bit, 5Msps-100+Gsps

Target Applications


  • Available in 28nm though advanced FinFET nodes



  • Distributed PVT sensing solution
  • ±1C Temperature accuracy
  • Single ended and differential voltage sense
  • Compact footprint, Low Iq
  • Latch-up detection
  • High speed glitch detection
  • Programmable sensor HUB

Target Applications


  • Available in 28nm though advanced FinFET nodes

Ensuring the Longevity of Your Chips: Embrace the OmniTRUST™ SoC Management Strategy

To be competitive today, many SOCs push the limits of operation to achieve maximum performance. Gone are the days when chip functionality was merely a concern during production and shipment. With SoC and multi-die designs, monitoring operation and adjusting operating conditions are critical to ensuring timely intervention before problems arise. Achieving this requires real time access to information about on-chip operating conditions, often for independent parts of a single chip. And then to be able to use this information to control the internal chip elements and operating conditions to avoid failures and ensure long term reliability.

Thermal Management and Power Optimization: The Key to SoC Success

Managing thermal complexities and optimizing power consumption stand as critical priorities for advanced SOCs. These problems exist on a single die but become even more critical with multiple dies in a single package, particularly as the system undergoes aging. Addressing these challenges requires both a understanding of the SOC design risk factors, and the strategic inclusion of real time monitoring devices that provide the hard data needed to optimize performance.

PVT Monitors

Process detectors, voltage monitors, and temperature sensors (PVT) serve as the fundamental building blocks for monitoring key metrics throughout the silicon lifecycle, from initial design to in-field operation. Instrumental in on-chip voltage and power management, PVT monitors enable dynamic voltage and frequency scaling (DVFS), and initiating shutdowns when temperatures veer toward critical levels.  PVT monitors have experienced widespread adoption, being employed in nearly all designs at 16nm and below, in most high-performance applications including data centers, communication networks, and automobiles. As the preventive measure, PVT monitors averts unwanted outcomes ahead of time.

Latch-up and Glitch detection

Temperature and supply variations are not the only challenge facing advanced SOCs today. Many high-performance systems can be exposed to environmental effects and operating conditions that can trigger latch-up conditions in the silicon. It is critical to detect and address these situations in real-time to avoid catastrophic failures.

A glitch detector with low-latency is another monitor that can be critical to ensuring reliable operation. These issues may arise from natural conditions such as noise, radiation, and power supply fluctuations, or by malicious attacks such as fault injection or tampering. Regardless of the origins, reliable operation requires first recognizing that a condition exists, and then taking corrective action.

The Sensor HUB: the Heart of the System

With distributed sensors, the overall management of the sensors are critical to successful application of the OmniTRUST™ SoC management strategy. From simplifying scan sequences, to setting trip points and alerts, the Sensor HUB can simplify the overall integration. Basic filters are included and are programmable to minimize false alarms. The controller hub simplifies customer integration and communications when interfacing to a range of sensors within the ASIC. The configurable monitoring system is compatible with digital design flows and supports both standard and test modes to support production test environments.

Other IP Technology

Linear Regulators and References

A selection of LDOs, References, voltage and current regulators with excellent stability

Swift™ Analog Front Ends

A selection of ADCs, DACs, References, voltage and current regulators and Signal conditioning IP optimized for key applications

Specialty IP

Voltage Buffer, Programable Gain Amplifier, LVDS I/O Cell

Standard IP Deliverables

IP Features

  • Application specific subsystem configuration
  • Digital interfacing for ease of integration and reliable sensor communications

High Speed Mixed-Signal Expertise and Support

  • High Speed Mixed-Signal IP has been developed by our expert engineering team since 2015
  • Easy IP integration with extensive support documentation and application notes
  • Production test results interpretation support

Integration Guidance and Placement

  • Expertise provided in monitor placement and configuration, based on end-use application
  • Optional floorplan layout review provided to assist with monitor and sensor placement


  • A comprehensive set of front-end and back-views are delivered to ensure ease of integration.


  • Datasheets, Application Notes and User Guides

Front-End (FE) Views

  • LEF
  • Verilog Model
  • Liberty timing files

Back-End (BE) Views

  • GDS Collateral (including tag and layer summary)
  • DFT
  • DRC Report (including antenna report)
  • LVS Report (including ERC report)
  • Netlist (for LVS purposes only)