Omni Design Technologies

Chiplets and ASICs

Omni Design’s Chiplet and ASIC activities are based on extensive domain knowledge and years of product development experience. The existing portfolio of technology platforms provides our customers with an unrivaled range of technology meeting and exceeding their system needs now and for their future technological roadmap. Omni Design has experience with high channel count, high speed Tx and Rx signal path integration, both at the IP level, and in silicon. The team has extensive experience addressing the issues of crosstalk, noise, and channel matching that can impact large multi-channel systems. In Chiplet formats, Omni Design can provide this with a variety of standard interfaces including JESD204(B, C, and D), PCIe, and Bunch of Wires, etc.. For specific requirements, please contact sales@omnidesigntech.com

IP Offerings

Analog to Digital Converters

Highlights

  • RF Sampling time-interleaved ADC
  • Excellent linearity and low noise
  • Power scalable with sample rate
  • 6-14 bit, 5Msps-100+Gsps ADCs,

Target Applications

  • Wireless Networks
  • 5G & 6G Trancievers
  • Optical Fiber Transceivers
  • LiDAR and RADAR
  • Quantum Computing

Technology

  • Available in 28nm through advanced FinFet nodes

Overview

High-Speed Analog to Digital Converters (ADC) are a critical bridge between advanced digital signal processing operations and the sensing elements used in advanced communications, 2 & 3D imaging, and advanced computing systems. The critical tradeoff is the efficiency of each conversion relative to the noise background. This is where Omni Design has excelled and achieved state of the art figures of merit for conversion efficiency. Further Omni Design’ data converters have small footprints and are available in a variety of process nodes from 28nm to advanced FinFet processes. All calibration is built in and runs in the background such that it compensates for both static and dynamic conditions. All ADC’s have integrated buffers to simplify interfacing and ensure compatibility with the overall system performance. Optional Digital Down Converters (DDC) are available to increase system compatibility. The ADC’s are available as individual IP blocks or matched IQ pairs and can be efficiently arrayed for large number of input channels

Time-Interleaving Artifact Compensation

For high performance operation, time-interleaving artifacts must be minimized: Offset mismatch, gain mismatch, timing skew, bandwidth mismatch Omni employs a combination of proprietary and patented techniques, including: Analog and digital correction Foreground and background correction Randomization and redundancy

Benefits

Omni’s time interleaving correction results in no notches in the output spectrum

Use Cases

Most communication systems are very sensitive to spurious frequency components and distortion in spectral characteristics. The compensation methods developed by Omni Design minimize these effects, resulting in higher system capacity and performance in customer systems.

Digital to Analog Converters

Highlights

  • Differential Current Output
  • Wide Output Bandwidth
  • Excellent linearity and low noise
  • Embedded Direct Digital Synthesis
  • 6-14 bit, 5Msps-100+Gsps DACs

Target Applications

  • Wireless Networks
  • 5G & 6G Transceivers
  • Optical Fiber Transceivers
  • LiDAR and RADAR
  • Quantum Computing

Technology

  • Available in 28nm though advanced FinFet nodes

Overview

High-Speed Digital to Analog converters are a critical in both communications systems where it is part of a complementary transmit and receive path, as well as in active imaging systems where a stimulus signal is used to create a reflection, which is subsequently measured.

In both cases, a high degree of linearity and phase control is needed over a wide bandwidth.

Omni Design utilizes a patented architecture that provides high linearity over wide bandwidths that make it ideally suited to these applications. Further Omni Design’ data converters have small footprints and are available in a variety of process nodes from 28nm to advanced FinFet processes. All calibration is built in and runs in the background such that it compensates for both static and dynamic conditions. Differential current outputs up to 0dBm CW output power. Optional Digital Up Converters (DUC) are available to increase system compatibility. The DAC’s are available as individual IP blocks or matched IQ pairs and can be efficiently arrayed for large number of input channels

Isolated Current Outputs

Generating clean high frequency signals presents many challenges. There can be a combination of internal circuit operations feeding through and contaminating the output, as well as the output feeding back into the circuit and modulating its performance. Both issues result in spectral contamination that degrades the quality of a digitally synthesized signal. The unique output structure developed by Omni Design acts as isolation between the output signal and internal circuit elements drastically reducing these effects.

Benefits

This reduction of artifacts in Omni Designs’ Digital to Analog converters allows generation of broad bandwidth signals with improved SFDR & PSRR.

Use Cases

The generation of clean signals is critical in both communications and in 3D imaging systems commonly used in automotive driver assistance. Latest generation communications depend on dense channel configurations using complex modulation schemes. These systems are sensitive to unwanted spectral artifacts as they can degrade channel bandwidth. The use of Omni Designs’ DACs in the transmit chain ensure maximum performance can be achieved.

Omni Lifecycle Analysis Suite

Highlights

  • Distributed PVT Sensing Solution
  • +/-  1C Temperature Accuracy
  • Single Ended and Differential Voltage Sense
  • Compact footprint, Low Iq
  • Latch-Up Detection
  • High Speed Glitch Detection
  • Programmable Sensor HUB

Target Applications

  • 5G/6G, Automotive, and Optical Data Communications
  • Thermal mapping across SOC
  • Power Optimization
  • Reliability enhancement

Technology

  • Available in 28nm though advanced FinFet nodes

Ensuring the Longevity of Your Chips: Embrace the Omni Lifecycle Management Strategy

To be competitive today, many SOCs push the limits of operation to achieve maximum performance. Gone are the days when chip functionality was merely a concern during production and shipment. With SoC and multi-die designs, monitoring operation and adjusting operating conditions are critical to ensuring timely intervention before problems arise. Achieving this requires real time access to information about on-chip operating conditions, often for independent parts of a single chip. And then to be able to use this information to control the internal chip elements and operating conditions to avoid failures and ensure long term reliability.

Thermal Management and Power Optimization: The Key to SoC Success

Managing thermal complexities and optimizing power consumption stand as critical priorities for advanced SOCs. These problems exist on a single die but become even more critical with multiple dies in a single package, particularly as the system undergoes aging. Addressing these challenges requires both a understanding of the SOC design risk factors, and the strategic inclusion of real time monitoring devices that provide the hard data needed to optimize performance.

Process detectors, voltage monitors, and temperature sensors (PVT) serve as the fundamental building blocks for monitoring key metrics throughout the silicon lifecycle, from initial design to in-field operation. PVT monitors have been instrumental in on-chip voltage and power management, enabling dynamic voltage and frequency scaling (DVFS), and initiating shutdowns when temperatures veer toward critical levels.  PVT monitors have experienced widespread adoption, being employed in nearly all designs at 16nm and below, in most high-performance applications including data centers, communication networks, and automobiles. PVT monitors serve as the preventive measure that averts unwanted outcomes ahead of time.

Latch-up and Glitch detection

Temperature and supply variations are not the only challenge facing advanced SOCs today. Many high-performance systems can be exposed to environmental effects and operating conditions that can trigger latch-up conditions in the silicon. It is critical to detect and address these situations in real time to avoid catastrophic failures. Often the impact of these failures are enormous relative to the cost of the basic hardware.

A glitch detector with low latency is another monitor that can be critical to ensuring reliable operation. These issues may arise from natural conditions such as noise, radiation, and power supply fluctuations, or by malicious attacks such as fault injection or tampering. Regardless of the origins, reliable operation requires first recognizing that a condition exists, and then taking corrective action.

The Sensor HUB: the Heart of the System

With distributed sensors, the overall management of the sensors are critical to successful application of the Omni Lifecycle Management Strategy. From simplifying scan sequences, to setting trip points and alerts, the Sensor HUB can simplify the overall integration. Basic filters are included and are programmable to minimize false alarms. The controller hub simplifies customer integration and communications when interfacing to a range of sensors within the ASIC. The configurable monitoring system is compatible with digital design flows and supports both standard and test modes to support production test environments.

Standard IP Deliverables

IP Features

  • Application specific subsystem configuration
  • Digital interfacing for ease of integration and reliable sensor communications

High Speed Mixed-Signal Expertise and Support

  • High Speed Mixed-Signal IP has been developed by our expert engineering team since 2015
  • Easy IP integration with extensive support documentation and application notes
  • Production test results interpretation support

Integration Guidance and Placement

  • Expertise provided in monitor placement and configuration, based on end-use application
  • Optional floorplan layout review provided to assist with monitor and sensor placement

Deliverables

  • A comprehensive set of front-end and back-views are delivered to ensure ease of integration.

Documentation

  • Datasheets, Application Notes and User Guides

Front-End (FE) Views

  • LEF
  • Verilog Model
  • Liberty timing files

Back-End (BE) Views

  • GDS Collateral (including tag and layer summary)
  • DFT
  • DRC Report (including antenna report)
  • LVS Report (including ERC report)
  • Netlist (for LVS purposes only)

About Omni Design Technologies, Inc.

Omni Design Technologies is a leading provider of high-performance, ultra-low power IP cores, from 28nm down through advanced FinFET nodes, which enable differentiated system-on-chip (SoC), in applications ranging from 5G, wireline and optical communications, LiDAR, radar, automotive networking, AI, image sensors, and the internet-of-things (IoT). Our data converter (ADC and DAC) IP cores range from 6-bit to 14-bit resolution and from a few MSPS to more than 100 GSPS sampling rates. Omni Design, founded in 2015 by semiconductor industry veterans, has an excellent track record of innovation and collaboration with customers to enable their success. The company is headquartered in Milpitas, California with additional design centers in Fort Collins-Colorado, Bangalore-India, Dublin-Ireland, Boston-Massachusetts.